Lower Power Genetic Algorithm
Algorithms AIMech:LowerPowerGeneticAlgorithm DRAFT
A processor-configuration optimizer that evolves a symmetry-based network encoding through constrained swap mutation and rank-grouped offspring production, optionally protects selected links in a CPA-guided second phase, and uses shortest-path hit estimates to choose a link cut for controller ports.
Identity Notes & Concept Scope
The actual 2026-10-15 post-cohort 351 collection at commit 8481972c496a6f9a40d645bb60e25800b6e5f8c3 covers 783 maintained and 442 generated records. Four fixed-word searches included ignored and hidden files across the original checkout and three retained discovery/recovery checkouts. All 23247 occurrences were reconstructed into 1030 distinct contents, freshly read in three attributed supporting partitions. Root read the focused complete candidate/restoration contents, all eight normalized identity/definition rows and fourteen contextual fields, every matching field for 43 frontier objects, both selected owners and all six restoration context owners. Normalization covered 4867 identity-field occurrences. No candidate collision was found within this bounded scope. The source-scoped 1996 LPGA uses a constrained processor-link encoding, swap mutation, rank-grouped offspring and an optional CPA-protected phase. Generic GA does not define those operators; GGA instead uses shared penalties and per-chromosome templates. Preserve the unread 1997 extension and original 2001 discovery pointer. Network is a related application/representation context, not an asserted algorithm superclass; no exact aliases are added.
Claims & Grounded Evidence
5 Claims
Mechanism
#processor-encoding-and-staged-controller
For the inspected four-channel processor problem, represent a regular network by two stored links per processor, with each processor label appearing twice and no self-assignment. Run the mutation-based population engine for a specified generation budget, with every schema position write-enabled in this first phase. Its optional second phase uses the first phase’s regular configuration and a CPA-derived schema to initialize a new population with selected positions protected. The resulting regular network is then converted to one with two free controller channels by a link-removal step.
Mechanism
#swap-only-variation
The GA engine creates an offspring by copying a parent and swapping two randomly selected string positions. It rejects choices that introduce self-assignment or touch a write-protected schema position, retrying until an allowable pair is chosen. This variation preserves the multiplicity of each stored processor label; the engine omits crossover.
Mechanism
#rank-grouped-offspring-and-survival
Before a generation, rank the population by fitness with random tie breaking and divide it into k groups. Assign descending maximum offspring quotas k through one. For each parent, choose an offspring count between one and its assigned maximum, mutate copies and reassess the parent/offspring pool, retaining fitter members for the next generation.
Mechanism
#critical-path-hit-table-and-protected-schema
For each processor pair, form the set of shortest paths. Count how many paths across these sets contain each link. Process the path sets in increasing cardinality, selecting the unique path when only one exists; otherwise select a path containing a link with greatest count among links in that set. Increment a separate hit-rate table for links on the selected path. A configured retention percentage selects popular links whose corresponding string positions become write-protected for the optional second phase.
Mechanism
#controller-port-link-removal
To provide two communication channels for the system controller, remove a link with the lowest hit count in the CPA hit-rate table from the regular processor configuration. The aim is to avoid a substantial increase in the paper’s distance and overshoot measures.
⚠️ Curated Limitations & Negative Results
- The printed d_avg equation sums only distances through the user-specified d_max and divides by N squared; it is not the unrestricted average distance when longer paths exist. The paper separately reports N_over. Its adjacent-node example uses distance one, while other prose describes intermediate nodes. The distance convention and conversion of the minimized distance score into ranked fitness are not fully specified; neither an equation correction nor a particular fitness transformation is imposed here.
- Swap mutation preserves label multiplicities and its checks prevent self-assignment/protected-position changes. Those constraints alone do not imply a connected processor network. The selected source does not fully specify disconnected-candidate distance handling or an additional connectivity test. No claim is made that the authors’ implementation actually generated such candidates.
- The production-table rule asks for k equal groups, but the reported population of 20 with k=3 requires an unstated boundary/rounding convention. Parent quotas, survivor ties, shortest-path ties and retention-percentage rounding do not uniquely specify an executable algorithm. Random choices are not automatically uniform.
- The retry-until-legal mutation loop requires a permissible pair. A restrictive schema can leave no legal pair or only no-op swaps; no fallback or finite retry bound is given. The fully writable first phase avoids protection-induced rejection, but it does not by itself guarantee a nontrivial mutation; no failure is asserted for the reported retention percentage. Protected positions restrict reachable configurations and can exclude better ones. Fixed generation budgets do not certify a local or global optimum.
- CPA counts selected shortest-path usage under its own tie conventions, not externally measured packet traffic. Protecting high-hit links and removing a lowest-hit link do not prove optimal future configurations or minimum deterioration of either objective. Explicit enumeration of all shortest paths can be expensive; the Low/Lower Power name does not provide a general complexity or speed bound.
- The paper’s finite 32–40-processor comparisons do not support universal superiority. Table 1 includes n=36, where LPGA(CPA) has d_avg 2.39 versus GAcSP(HC) 2.38; Table 2 also has rows where CPA is worse. Mean distance and time values and best-observed overshoot counts use different aggregation, and AMP execution times are unavailable. The reported results have not been independently reproduced here.
- This account is bounded to the inspected 1996 eight-page author manuscript, which uses both Lower Power and Low Power for LPGA and motivates Power by simplicity and computational cost, not a processor-energy objective. The 1997 journal paper is bibliographically identified, but its full text was not inspected; retained publisher access attempts returned HTTP 403. Later GGA and thesis passages supply lineage context, not exact version equivalence or a reason to import adaptive GGA penalties. The original AMP and GAcSP comparator methods were not inspected in this research.
Artificial Intelligence Ontology (AIO) Grounding
Mapped AIO Classes
| AIO Target Class | Mapping Relation | Mapping Rationale |
|---|---|---|
AIO:Network
Network
|
related_match | The scoped LPGA is defined by constructing a processor communication network: its chromosome encodes physical links, its CPA examines graph paths and its final operation frees two network ports. This is constitutive to the selected method rather than an incidental example of a generic optimizer. The target denotes the interconnected system being constructed, whereas LPGA denotes the construction/search procedure; this is a qualified relation across abstraction levels, not exact equivalence, a broad-match/is-a assertion, a neural architecture or an upstream ontology edit. |
Evidence Sources & Primary Literature
1 Source| Source ID | Publication / Document | Type / Access | Reference & Checksum |
|---|---|---|---|
lau-tsang1996
|
T. L. Lau, E. P. K. Tsang
|
primary paper
full_text
|
ID: https://doi.org/10.1109/TAI.1996.560395
sha256:d72bc73be448…
|
Curation Provenance
Curator: Codex
Method: ai_assisted
Model: GPT-6
Created: 2026-10-15T22:07:33Z
Updated: 2026-10-15T22:07:33Z
Source File:
data/curated/LowerPowerGeneticAlgorithm.yaml