AIMech AI

ZeRO-Offload

Algorithms AIMech:ZeROOffloadHeterogeneousLargeModelTraining DRAFT
Aliases: Zero Redundancy Optimizer Offload, ZeRO-Offload Heterogeneous GPU-CPU Training, DeepSpeed ZeRO-Offload
A heterogeneous GPU-CPU deep learning training algorithm for mixed-precision Adam optimization that partitions the directed cyclic training data-flow graph into two device super-nodes: it retains FP16 parameters (p_16, 2M bytes) and O(M B) forward-backward propagation (FWD-BWD Super Node) on GPU while offloading FP16 gradients (g_16, 2M bytes), FP32 master parameters, momentum, and variance (p_32, m_32, v_32, 12M bytes), and O(M) parameter update and float2half casting computations (Update Super Node) to CPU, combining with ZeRO Stage-2 across multiple GPUs so each rank offloads and updates only a 1 / N_dp partition on CPU.
Identity Notes & Concept Scope Distinct from GPU-only model-state sharding (ZeRO-1/2/3, which require aggregate GPU memory to hold all model states), from layer-to-layer weight swapping (L2L, which keeps optimizer compute on GPU, incurs 28M CPU-GPU communication per step, and cannot scale across multiple GPUs), and from ZeRO-Infinity (which builds on ZeRO-3 to partition parameters and offload to NVMe plus CPU with memory-centric tiling).

Claims & Grounded Evidence

4 Claims
Mechanism #c-r627-unique-optimal-dataflow-cut-and-8x-memory-reduction
Modeling mixed-precision Adam training on M parameters (16M bytes of model states: 2M each for p_16 and g_16, 4M each for p_32, m_32, and v_32) as a weighted directed cyclic data-flow graph where O(M B) FWD-BWD compute resides on GPU implies that any model-state offload cut must cross at least two directed cycle edges of weight >= 2M, yielding a theoretical minimum GPU-CPU communication volume of 4M bytes per step (2M g_16 offload + 2M p_16 swap); among all partitions achieving 4M communication, co-locating {g_16, p_32, m_32, v_32, ParamUpdate, float2half} on CPU and {p_16, FWD-BWD} on GPU uniquely achieves the maximum 8x GPU model-state memory reduction (from 16M to 2M steady / 4M buffered, Table 1).
Mechanism #c-r627-zero2-symbiotic-multi-gpu-invariance-and-cpu-adam
By integrating with ZeRO Stage-2 across N_dp data-parallel GPUs, each GPU reduce-scatters and offloads only its 1 / N_dp partition of FP16 gradients to CPU and updates only its 1 / N_dp shard of FP32 optimizer states in parallel via a SIMD AVX512 / loop-unrolled / OpenMP CPU-Adam kernel before an all-gather on GPU, keeping aggregate GPU-CPU communication volume constant at 4M bytes regardless of N_dp while scaling total CPU optimizer compute linearly with N_dp.
Application #c-r627-one-step-delayed-parameter-update-and-billion-scale-training
To hide CPU optimizer overhead at small batch sizes, One-Step Delayed Parameter Update (DPU) trains the first N - 1 steps normally, skips the CPU update at step N, and for step i >= N + 1 executes the CPU parameter update using step i - 1 gradients concurrently with the GPU forward-backward pass using step i - 1 parameters (Figure 6), yielding 1.12x-1.59x higher throughput while preserving GPT-2 pretraining loss and BERT-Large SQuAD F1 (92.8), and enabling 13B-parameter training on a single V100 GPU at 40 TFLOPS and 70B-parameter training on a 16-GPU DGX-2 node.
Limitation #c-r627-replicated-fp16-parameter-and-pcie-bandwidth-limitation
Because ZeRO-Offload builds on ZeRO-2 and keeps a full replica of FP16 parameters p_16 on every GPU, its maximum trainable model size without model parallelism is bounded by the parameter capacity of a single GPU's memory, and at large GPU counts (e.g., 64-128 GPUs) where ZeRO-2 fits in aggregate GPU memory, ZeRO-Offload's PCIe transfer overhead makes it slightly slower than GPU-only ZeRO-2.

⚠️ Curated Limitations & Negative Results

Artificial Intelligence Ontology (AIO) Grounding

Mapped AIO Classes
AIO Target Class Mapping Relation Mapping Rationale
AIO:ArtificialNeuralNetwork
Artificial Neural Network
related_match ZeRO-Offload partitions the mixed-precision training data-flow graph of deep artificial neural networks across GPU and CPU memory and compute.

Evidence Sources & Primary Literature

3 Sources
Source ID Publication / Document Type / Access Reference & Checksum
r627-primary-pdf
Jie Ren, Samyam Rajbhandari, Reza Yazdani Aminabadi, Olatunji Ruwase, Shuangyan Yang, Minjia Zhang, Dong Li, Yuxiong He
primary paper
full_text
ID: https://dblp.org/rec/conf/usenix/0015RARYZ0H21
sha256:361dd58aadd7…
r627-arxiv-abs
Jie Ren, Samyam Rajbhandari, Reza Yazdani Aminabadi, Olatunji Ruwase, Shuangyan Yang, Minjia Zhang, Dong Li, Yuxiong He
primary paper
abstract_only
ID: https://arxiv.org/abs/2101.06840
sha256:239c8f08d6e5…
r627-metadata-cr
Jie Ren, Samyam Rajbhandari, Reza Yazdani Aminabadi, Olatunji Ruwase, Shuangyan Yang, Minjia Zhang, Dong Li, Yuxiong He
primary paper
abstract_only
ID: https://dblp.org/rec/conf/usenix/0015RARYZ0H21
sha256:ff7ded02b457…

Ontology & Grounding Topology

Open in interactive network graph →
CONCEPT KIND Algorithms AIMech:ZeROOffloadHeterogeneousLargeModelTraining ZeRO-Offload 4 claims · 3 sources AIO GROUNDING AIO:ArtificialNeuralNetwork (1)

Curation Provenance

Curator: Antigravity
Method: ai_assisted
Model: Gemini
Created: 2026-10-19T11:50:00Z
Updated: 2026-10-19T11:50:00Z
Source File: data/curated/ZeROOffloadHeterogeneousLargeModelTraining.yaml · Schema: curated_concept.yaml

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